opentone

Source: ST DS10693 Rev 10 (STM32F446xC/E datasheet), Table 10. 100-pin LQFP100 package, pin 1 at the top-left corner, numbered counter-clockwise.

Alternate functions are selected through the GPIOx_AFR registers; additional functions are enabled directly through peripheral registers (ADC, DAC, oscillator, wake-up, …). Peripheral bus speeds are in docs/public/pinout/buses.json.

#	Pin	Type	Default function	Alternate functions	Additional functions	Datasheet notes
1	`PE2`	I/O · FT · 5V-tolerant I/O	GPIO	TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, FMC_A23, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
2	`PE3`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED0, SAI1_SD_B, FMC_A19, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
3	`PE4`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
4	`PE5`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
5	`PE6`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
6	`VBAT`	Power	Backup power supply	—	—	Keeps RTC, backup registers and PC13-PC15 alive when VDD is off; tie to VDD if no backup battery.
7	`PC13`	I/O · FT · 5V-tolerant I/O	GPIO	EVENTOUT	TAMP_1/WKUP1	max 2 MHz (30 pF max) Backup-domain pin (fed through the VBAT power switch): sinks or sources 3 mA max; as an output, ≤ 2 MHz with ≤ 30 pF load (DS10693 §6.3.17). Keep for slow signals. WKUP1 / RTC tamper: can wake the MCU from Standby. Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
8	`PC14-OSC32_IN`	I/O · FT · 5V-tolerant I/O	GPIO	EVENTOUT	OSC32_IN	max 2 MHz (30 pF max) Backup-domain pin (fed through the VBAT power switch): sinks or sources 3 mA max; as an output, ≤ 2 MHz with ≤ 30 pF load (DS10693 §6.3.17). Keep for slow signals. LSE 32.768 kHz crystal pin: only a GPIO when the LSE is unused. Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
9	`PC15-OSC32_OUT`	I/O · FT · 5V-tolerant I/O	GPIO	EVENTOUT	OSC32_OUT	max 2 MHz (30 pF max) Backup-domain pin (fed through the VBAT power switch): sinks or sources 3 mA max; as an output, ≤ 2 MHz with ≤ 30 pF load (DS10693 §6.3.17). Keep for slow signals. LSE 32.768 kHz crystal pin: only a GPIO when the LSE is unused.
10	`VSS`	Power	Ground	—	—	—
11	`VDD`	Power	Digital supply	—	—	—
12	`PH0-OSC_IN`	I/O · FT · 5V-tolerant I/O	GPIO	EVENTOUT	OSC_IN	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) HSE 4-26 MHz crystal / clock pin: only a GPIO when the HSE is unused. USB needs HSE for an accurate 48 MHz. Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
13	`PH1-OSC_OUT`	I/O · FT · 5V-tolerant I/O	GPIO	EVENTOUT	OSC_OUT	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) HSE 4-26 MHz crystal / clock pin: only a GPIO when the HSE is unused. USB needs HSE for an accurate 48 MHz. Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
14	`NRST`	Reset	System reset (weak pull-up)	—	—	Bidirectional reset with weak pull-up. Tolerates no negative current injection (DS10693 Table 55).
15	`PC0`	I/O · FT · 5V-tolerant I/O	GPIO	SAI1_MCLK_B, OTG_HS_ULPI_STP, FMC_SDNWE, EVENTOUT	ADC123_IN10	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
16	`PC1`	I/O · FT · 5V-tolerant I/O	GPIO	SPI3_MOSI/I2S3_SD, SAI1_SD_A, SPI2_MOSI/I2S2_SD, EVENTOUT	ADC123_IN11	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
17	`PC2`	I/O · FT · 5V-tolerant I/O	GPIO	SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, EVENTOUT	ADC123_IN12	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
18	`PC3`	I/O · FT · 5V-tolerant I/O	GPIO	SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, FMC_SDCKE0, EVENTOUT	ADC123_IN13	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
19	`VDD`	Power	Digital supply	—	—	—
20	`VSSA`	Power	Analog ground	—	—	—
21	`VREF+`	Power	ADC/DAC reference voltage	—	—	Must be tied to VDDA (with decoupling) on this package; on LQFP64 it is bonded to VDDA internally.
22	`VDDA`	Power	Analog supply	—	—	Analog supply for ADC/DAC/PLLs: tie to VDD with its own decoupling.
23	`PA0-WKUP`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, EVENTOUT	ADC123_IN0, WKUP0/TAMP_2	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) WKUP0: can wake the MCU from Standby.
24	`PA1`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, EVENTOUT	ADC123_IN1	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
25	`PA2`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, EVENTOUT	ADC123_IN2	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
26	`PA3`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH4, TIM5_CH4, TIM9_CH2, SAI1_FS_A, USART2_RX, OTG_HS_ULPI_D0, EVENTOUT	ADC123_IN3	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
27	`VSS`	Power	Ground	—	—	—
28	`VDD`	Power	Digital supply	—	—	—
29	`PA4`	I/O · TTa · ADC I/O	GPIO	SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, EVENTOUT	ADC12_IN4, DAC_OUT1	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) TTa: 3.3 V tolerant only (not 5 V tolerant), wired straight to the ADC/DAC.
30	`PA5`	I/O · TTa · ADC I/O	GPIO	TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK, EVENTOUT	ADC12_IN5, DAC_OUT2	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) TTa: 3.3 V tolerant only (not 5 V tolerant), wired straight to the ADC/DAC.
31	`PA6`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, TIM13_CH1, DCMI_PIXCLK, EVENTOUT	ADC12_IN6	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
32	`PA7`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, TIM14_CH1, FMC_SDNWE, EVENTOUT	ADC12_IN7	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
33	`PC4`	I/O · FT · 5V-tolerant I/O	GPIO	I2S1_MCK, SPDIFRX_IN2, FMC_SDNE0, EVENTOUT	ADC12_IN14	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
34	`PC5`	I/O · FT · 5V-tolerant I/O	GPIO	USART3_RX, SPDIFRX_IN3, FMC_SDCKE0, EVENTOUT	ADC12_IN15	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
35	`PB0`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI3_MOSI/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, SDIO_D1, EVENTOUT	ADC12_IN8	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
36	`PB1`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, SDIO_D2, EVENTOUT	ADC12_IN9	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
37	`PB2-BOOT1`	I/O · FT · 5V-tolerant I/O	BOOT1	TIM2_CH4, SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, OTG_HS_ULPI_D4, SDIO_CK, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) BOOT1 strap: only sampled at reset when BOOT0 = 1.
38	`PE7`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
39	`PE8`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
40	`PE9`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
41	`PE10`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH2N, QUADSPI_BK2_IO3, FMC_D7, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
42	`PE11`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH2, SPI4_NSS, SAI2_SD_B, FMC_D8, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
43	`PE12`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, FMC_D9, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
44	`PE13`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH3, SPI4_MISO, SAI2_FS_B, FMC_D10, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
45	`PE14`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
46	`PE15`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_BKIN, FMC_D12, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
47	`PB10`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, SAI1_SCK_A, USART3_TX, OTG_HS_ULPI_D3, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
48	`VCAP_1`	Power	Regulator capacitor	—	—	External ceramic capacitor to ground for the 1.2 V regulator (DS10693 Table 18).
49	`VSS`	Power	Ground	—	—	—
50	`VDD`	Power	Digital supply	—	—	—
51	`PB12`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, OTG_HS_ID, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
52	`PB13`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, EVENTOUT	OTG_HS_VBUS	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
53	`PB14`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH2N, TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, OTG_HS_DM, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Supplied by VDDUSB, which is bonded to VDD on this package (VDDUSB pin only on WLCSP81/UFBGA144/LQFP144).
54	`PB15`	I/O · FT · 5V-tolerant I/O	GPIO	RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Supplied by VDDUSB, which is bonded to VDD on this package (VDDUSB pin only on WLCSP81/UFBGA144/LQFP144).
55	`PD8`	I/O · FT · 5V-tolerant I/O	GPIO	USART3_TX, SPDIFRX_IN1, FMC_D13, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
56	`PD9`	I/O · FT · 5V-tolerant I/O	GPIO	USART3_RX, FMC_D14, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
57	`PD10`	I/O · FT · 5V-tolerant I/O	GPIO	USART3_CK, FMC_D15, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
58	`PD11`	I/O · FT · 5V-tolerant I/O	GPIO	FMPI2C1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
59	`PD12`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM4_CH1, FMPI2C1_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
60	`PD13`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM4_CH2, FMPI2C1_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
61	`PD14`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM4_CH3, FMPI2C1_SCL, SAI2_SCK_A, FMC_D0, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
62	`PD15`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM4_CH4, FMPI2C1_SDA, FMC_D1, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
63	`PC6`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM3_CH1, TIM8_CH1, FMPI2C1_SCL, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
64	`PC7`	I/O · FTf · 5V-tolerant I/O (FM+)	GPIO	TIM3_CH2, TIM8_CH2, FMPI2C1_SDA, SPI2_SCK/I2S2_CK, I2S3_MCK, SPDIFRX_IN1, USART6_RX, SDIO_D7, DCMI_D1, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) FTf: 5 V tolerant, I2C Fast-mode Plus (1 MHz) capable.
65	`PC8`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED0, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, SDIO_D0, DCMI_D2, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
66	`PC9`	I/O · FT · 5V-tolerant I/O	GPIO	MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
67	`PA8`	I/O · FT · 5V-tolerant I/O	GPIO	MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
68	`PA9`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, SAI1_SD_B, USART1_TX, DCMI_D0, EVENTOUT	OTG_FS_VBUS	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
69	`PA10`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
70	`PA11`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Supplied by VDDUSB, which is bonded to VDD on this package (VDDUSB pin only on WLCSP81/UFBGA144/LQFP144).
71	`PA12`	I/O · FT · 5V-tolerant I/O	GPIO	TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Supplied by VDDUSB, which is bonded to VDD on this package (VDDUSB pin only on WLCSP81/UFBGA144/LQFP144).
72	`PA13 (JTMS-SWDIO)`	I/O · FT · 5V-tolerant I/O	SWD data (JTMS-SWDIO)	JTMS-SWDIO, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) SWD after reset: using it as a GPIO disables debugging (recover with connect-under-reset).
73	`VCAP_2`	Power	Regulator capacitor	—	—	External ceramic capacitor to ground for the 1.2 V regulator (DS10693 Table 18).
74	`VSS`	Power	Ground	—	—	—
75	`VDD`	Power	Digital supply	—	—	—
76	`PA14 (JTCK-SWCLK)`	I/O · FT · 5V-tolerant I/O	SWD clock (JTCK-SWCLK)	JTCK-SWCLK, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) SWD after reset: using it as a GPIO disables debugging (recover with connect-under-reset).
77	`PA15 (JTDI)`	I/O · FT · 5V-tolerant I/O	JTDI	JTDI, TIM2_CH1/TIM2_ETR, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) JTAG function after reset: free once the debug port is set to SWD only (PB3 keeps SWO trace).
78	`PC10`	I/O · FT · 5V-tolerant I/O	GPIO	SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
79	`PC11`	I/O · FT · 5V-tolerant I/O	GPIO	SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
80	`PC12`	I/O · FT · 5V-tolerant I/O	GPIO	I2C2_SDA, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
81	`PD0`	I/O · FT · 5V-tolerant I/O	GPIO	SPI4_MISO, SPI3_MOSI/I2S3_SD, CAN1_RX, FMC_D2, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
82	`PD1`	I/O · FT · 5V-tolerant I/O	GPIO	SPI2_NSS/I2S2_WS, CAN1_TX, FMC_D3, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
83	`PD2`	I/O · FT · 5V-tolerant I/O	GPIO	TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
84	`PD3`	I/O · FT · 5V-tolerant I/O	GPIO	TRACED1, SPI2_SCK/I2S2_CK, USART2_CTS, QUADSPI_CLK, FMC_CLK, DCMI_D5, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
85	`PD4`	I/O · FT · 5V-tolerant I/O	GPIO	USART2_RTS, FMC_NOE, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
86	`PD5`	I/O · FT · 5V-tolerant I/O	GPIO	USART2_TX, FMC_NWE, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
87	`PD6`	I/O · FT · 5V-tolerant I/O	GPIO	SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
88	`PD7`	I/O · FT · 5V-tolerant I/O	GPIO	USART2_CK, SPDIFRX_IN0, FMC_NE1, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V)
89	`PB3 (JTDO/TRACESWO)`	I/O · FT · 5V-tolerant I/O	JTDO/TRACESWO	JTDO/TRACESWO, TIM2_CH2, I2C2_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) JTAG function after reset: free once the debug port is set to SWD only (PB3 keeps SWO trace). Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
90	`PB4 (NJTRST)`	I/O · FT · 5V-tolerant I/O	NJTRST	NJTRST, TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) JTAG function after reset: free once the debug port is set to SWD only (PB3 keeps SWO trace). Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
91	`PB5`	I/O · FT · 5V-tolerant I/O	GPIO	TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, FMC_SDCKE1, DCMI_D10, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
92	`PB6`	I/O · FT · 5V-tolerant I/O	GPIO	TIM4_CH1, HDMI_CEC, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1, DCMI_D5, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
93	`PB7`	I/O · FT · 5V-tolerant I/O	GPIO	TIM4_CH2, I2C1_SDA, USART1_RX, SPDIFRX_IN0, FMC_NL, DCMI_VSYNC, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
94	`BOOT0`	Boot	Boot configuration	—	VPP	Dedicated boot pin: pull low to boot from Flash. Tolerates no negative current injection (DS10693 Table 55).
95	`PB8`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH1/TIM2_ETR, TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, SDIO_D4, DCMI_D6, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
96	`PB9`	I/O · FT · 5V-tolerant I/O	GPIO	TIM2_CH2, TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, SAI1_FS_B, CAN1_TX, SDIO_D5, DCMI_D7, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
97	`PE0`	I/O · FT · 5V-tolerant I/O	GPIO	TIM4_ETR, SAI2_MCLK_A, FMC_NBL0, DCMI_D2, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
98	`PE1`	I/O · FT · 5V-tolerant I/O	GPIO	FMC_NBL1, DCMI_D3, EVENTOUT	—	max 100 MHz (OSPEEDR=11, 30 pF, VDD ≥ 2.7 V) Tolerates no negative current injection (0 mA, DS10693 Table 55): a signal below VSS can disturb it. Keep it away from long or noisy lines.
99	`VSS`	Power	Ground	—	—	—
100	`VDD`	Power	Digital supply	—	—	—